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https://doi.org/10.1109/JSSC.2023.3314433 +
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https://doi.org/10.1109/JSSC.2023.3314433 +
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https://dblp.org/db/journals/jssc/jssc59 +
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--01
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15
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116-127
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https://doi.org/10.1109/JSSC.2023.3314433 +
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IEEE J. Solid State Circuits
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IEEE J. Solid State Circuits
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59
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1
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A Nonvolatile AI-Edge Processor With SLC-MLC Hybrid ReRAM Compute-in-Memory Macro Using Current-Voltage-Hybrid Readout Scheme.
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2024
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Hung-Hsi Hsu et al.: A Nonvolatile AI-Edge Processor With SLC-MLC Hybrid ReRAM Compute-in-Memory Macro Using Current-Voltage-Hybrid Readout Scheme. (2024)
|
