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https://dblp.org/pid/214/9699 +
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, https://dblp.org/pid/67/3746 +
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| https://dblp.org/rdf/schema#bibtexType
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http://purl.org/net/nknouf/ns/bibtex#Inproceedings +
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https://dblp.org/pid/214/9699 +
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| https://dblp.org/rdf/schema#documentPage
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https://doi.org/10.1109/RTSS55097.2022.00037 +
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https://doi.org/10.1109/RTSS55097.2022.00037 +
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https://dblp.org/db/conf/rtss/rtss2022 +
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8
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| https://dblp.org/rdf/schema#pagination
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344-355
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https://doi.org/10.1109/RTSS55097.2022.00037 +
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https://dblp.org/rec/conf/rtss/2022 +
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RTSS
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| https://dblp.org/rdf/schema#publishedInBook
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RTSS
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https://dblp.org/streams/conf/rtss +
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| https://dblp.org/rdf/schema#title
|
Latency-driven Optimization of Switching Pipeline Design in Network Chips.
|
| https://dblp.org/rdf/schema#yearOfEvent
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2022
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| https://dblp.org/rdf/schema#yearOfPublication
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2022
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Jiale Chen et al.: Latency-driven Optimization of Switching Pipeline Design in Network Chips. (2022)
|
