Browse Wiki & Semantic Web

Jump to: navigation, search
Https://dblp.org/rec/conf/isvlsi/ZhaoCSPM17
  This page has no properties.
hide properties that link here 
  No properties link to this page.
 
https://dblp.org/rec/conf/isvlsi/ZhaoCSPM17
https://dblp.org/rdf/schema#authoredBy https://dblp.org/pid/75/7785 + , https://dblp.org/pid/203/5652 + , https://dblp.org/pid/30/6673 + , https://dblp.org/pid/16/6199-1 + , https://dblp.org/pid/99/4567 +
https://dblp.org/rdf/schema#bibtexType http://purl.org/net/nknouf/ns/bibtex#Inproceedings +
https://dblp.org/rdf/schema#documentPage https://doi.org/10.1109/ISVLSI.2017.104 + , https://doi.ieeecomputersociety.org/10.1109/ISVLSI.2017.104 +
https://dblp.org/rdf/schema#doi https://doi.org/10.1109/ISVLSI.2017.104 + , http://dx.doi.org/10.1109/ISVLSI.2017.104 +
https://dblp.org/rdf/schema#listedOnTocPage https://dblp.org/db/conf/isvlsi/isvlsi2017 +
https://dblp.org/rdf/schema#numberOfCreators 5
https://dblp.org/rdf/schema#pagination 562-567
https://dblp.org/rdf/schema#primaryDocumentPage https://doi.org/10.1109/ISVLSI.2017.104 +
https://dblp.org/rdf/schema#publishedAsPartOf https://dblp.org/rec/conf/isvlsi/2017 +
https://dblp.org/rdf/schema#publishedIn ISVLSI
https://dblp.org/rdf/schema#publishedInBook ISVLSI
https://dblp.org/rdf/schema#title Compact Modeling of Graphene Barristor for Digital Integrated Circuit Design.
https://dblp.org/rdf/schema#yearOfEvent 2017
https://dblp.org/rdf/schema#yearOfPublication 2017
owl:sameAs https://doi.org/10.1109/ISVLSI.2017.104 + , http://dx.doi.org/10.1109/ISVLSI.2017.104 +
rdf:type https://dblp.org/rdf/schema#Publication + , https://dblp.org/rdf/schema#Inproceedings +
rdfs:label Zhou Zhao et al.: Compact Modeling of Graphene Barristor for Digital Integrated Circuit Design. (2017)
hide properties that link here 
  This page has no properties.
 

 

Enter the name of the page to start semantic browsing from.