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https://dblp.org/rec/conf/iccsie/ZhaoWL22

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https://dblp.org/rdf/schema#title	System Verilog model design for AGC algorithm verification in SoC.
https://dblp.org/rdf/schema#yearOfEvent	2022
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rdfs:label	Shuangye Zhao et al.: System Verilog model design for AGC algorithm verification in SoC. (2022)

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